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2012 年 2 月 10 日 星期五  |
| Fintronic Super FinSim v9.3.8 LINUX |
分類: 未分類 |
弘前亮子 成瀨心美 音速小子
商品名稱： Fintronic Super FinSim v9.3.8 LINUX
商品分類： Linux系統專用軟體
商品類型： 線性FinSim Verilog仿真器軟體
語系版本： 英文正式版
運行平台： LINUX (以官方網站為準)
更新日期： 2008-01-04
破解說明:
1.Install application, make sure to toggle the NO DONGLE option.
2.copy our supplied license.dat from /CRACK to program dir(ie ...\FinSim\bin\cl)
3. You MUST add the full path to the LM_LICENSE_FILE environment variable AND
create FINTRON_LICENSE_FILE environment variable also with full path to license
file(ie ...\FinSim\bin\cl),also same with FINTRONIC env. variable.All three must
contain full path including license.dat filename!
內容說明:
Super-FinSim是頂級的線性FinSim Verilog仿真器，從1993年放出第一款FinSim Verilog
仿真器至今，FinSim Verilog已經引入了許多嶄新的功能：混合編譯和解釋型仿真，仿真
工廠可以讓工程師管理數以百計的同步仿真、分離和增量編譯、高性能保存和重啟、直接
集成C代碼，無須PLI。分別為windows、linux平台版本。
英文說明:
Super-FinSim is the top of the line FinSim Verilog
simulator. Ever since the first FinSim Verilog simulator has
been sold in 1993, the FinSim Verilog simulators have
introduced many new features that have become state of the
art in Verilog simulation: mixed Compiled and Interpreted
simulation, simulation Farm that allows one engineer to
manage hundreds of simultaneous simulations, separate and
incremental compilation, high performance save and restart,
direct integration with C code without the need for PLI,
etc.
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